Lead Engineer - IC Design

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com. The Role: This position involves contributing to Design-for-Test (DFT) architecture and implementation for complex SoCs, including multi-core processors, memory subsystems, and high-speed interfaces. The candidate will work on scan, ATPG, MBIST, and JTAG-based test solutions, and collaborate with cross-functional teams to support silicon bring-up, validation, and production. Responsibilities: Contribute to DFT architecture including scan, JTAG, boundary scan, MBIST, and at-speed testing Implement and integrate DFT features at block and SoC level Support ATPG pattern generation, simulation, and debug Collaborate with design, verification, physical design, and test teams Work on scan coverage improvement and test time optimization Support silicon bring-up, ATE validation, and failure debug Maintain DFT documentation and test collateral Requirements: Strong understanding of DFT concepts for multi-clock SoC designs Experience with ATPG for stuck-at, transition, and other fault models Hands-on experience with DFT tools (Tessent, DFT Compiler, or similar) Familiarity with JTAG and boundary scan Knowledge of low-power DFT and MBIST concepts Exposure to RTL design and integration (Verilog/SystemVerilog) Scripting skills (Python/Perl/Tcl/shell) Qualifications: Bachelor’s or Master’s degree in Electrical or Computer Engineering 5+ years of experience in DFT/ASIC/SoC design Experience working with cross-functional and global teams Exposure to ATE platforms (Advantest, Teradyne) is a plus Strong debugging, analytical, and problem-solving skills Good communication and collaboration skills Benefits & Perks: Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun. Equity Rewards (RSUs) Insurance plans with Outpatient cover National Pension Scheme (NPS) Flexible work policy Childcare support Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law. At Silicon Labs, we hire and empower great talent to achieve their full potential. By offering challenging projects, technical mentorship, and continuous learning opportunities, we ensure our employees thrive at every stage of their careers. Here, you’ll work alongside some of the industry’s brightest minds, tackling complex problems that deepen your expertise and expand your horizons. Whether you’re building new skills or shaping your career path, we’re dedicated to supporting your growth and celebrating your success every step of the way. Please note that our Company never asks for personal information unrelated to the job application process, such as bank or credit card data and never charges any fees to apply to any jobs. For more information please click here.